The AMD Epyc 9355 carries a Thermal Design Power (TDP) of 280W and is manufactured on a 4nm process node, reflecting the density and efficiency characteristics of its silicon design. It supports the PCIe 5.0 interface standard, enabling high-bandwidth connectivity for compatible expansion hardware. The processor is fully 64-bit capable and does not include integrated graphics, which is consistent with its server-focused positioning.
The Epyc 9355 features 32 cores running at a base clock of 3.55 GHz across all cores, supporting 64 threads in total, with a turbo clock speed of 4.4 GHz. The clock multiplier is set at 35.5 and is locked, meaning it cannot be adjusted for overclocking. On the cache side, the processor provides 2560 KB of L1 cache and 32 MB of L2 cache total, with each core allocated 1 MB of L2. The L3 cache stands at 256 MB across the chip, translating to 8 MB per core, offering a substantial pool of fast-access memory to support sustained multi-threaded workloads.
The Epyc 9355 uses DDR5 memory and supports up to 12 memory channels, with a maximum RAM speed of 6000 MHz. Peak memory bandwidth reaches 576 GB/s, facilitated by the wide multi-channel configuration. The processor can address up to 9000 GB of total memory, making it well-suited for memory-intensive server deployments. ECC memory support is included, providing hardware-level error detection and correction to help maintain data integrity in continuous operation environments.
The Epyc 9355 supports multithreading, allowing each physical core to handle multiple threads simultaneously for more efficient utilization under parallel workloads. The processor includes the NX bit, a hardware security feature that helps prevent certain classes of malicious code execution by marking memory regions as non-executable. In terms of instruction set support, the chip covers a broad range including AVX2, AES, FMA3, F16C, as well as MMX, AVX, SSE 4.1, and SSE 4.2, enabling acceleration across a variety of computational tasks such as cryptographic operations, floating-point processing, and vectorized arithmetic.