The AMD Epyc 9535 carries a Thermal Design Power (TDP) of 300W and is manufactured on a 4nm semiconductor process, reflecting a modern fabrication node suited for dense, high-core-count server designs. It supports the PCIe 5.0 interface standard, enabling high-bandwidth connectivity for compatible expansion hardware, and fully supports 64-bit computing. The processor does not include integrated graphics, which is typical for server-oriented CPUs where discrete or remote management solutions are used instead.
The AMD Epyc 9535 features 64 cores running at a base clock of 2.4 GHz, delivering 128 threads in total, with a turbo clock speed that reaches up to 4.3 GHz under boosted conditions. The clock multiplier is set at 24 and the multiplier is locked, meaning no manual frequency adjustment is available. On the cache side, the processor includes 5120 KB of L1 cache, 64 MB of L2 cache distributed at 1 MB per core, and a substantial 256 MB of L3 cache allocated at 4 MB per core, providing multiple layers of fast data access to support the high thread count during demanding workloads.
The AMD Epyc 9535 supports DDR5 memory across 12 memory channels, with a maximum RAM speed of 6000 MHz and a peak memory bandwidth of 576 GB/s, enabling substantial data throughput for memory-intensive server tasks. The processor accommodates up to 9000 GB of total memory, providing extensive capacity for large in-memory datasets and virtualized environments. ECC memory is also supported, which allows the system to detect and correct single-bit memory errors, an important reliability feature in continuous-operation server deployments.
The AMD Epyc 9535 supports multithreading, allowing each physical core to handle multiple threads simultaneously to improve throughput in parallel workloads. It implements a broad range of instruction set extensions, including MMX, F16C, FMA3, AES, AVX, AVX2, SSE 4.1, and SSE 4.2, which enable hardware-accelerated operations across areas such as floating-point math, encryption, and vector processing. The processor also includes the NX bit, a hardware security feature that helps prevent certain classes of malicious code execution by marking memory regions as non-executable.