The AMD Epyc 9645 carries a Thermal Design Power (TDP) of 320W and is fabricated on a 3 nm semiconductor process, reflecting a compact manufacturing node for a processor in this class. It supports the PCIe 5.0 interface and is fully 64-bit compatible, while it does not include integrated graphics, meaning a discrete graphics solution is required in any deployment.
The Epyc 9645 runs 96 cores at a base clock of 2.3 GHz, supporting 192 threads in total, with a turbo clock speed that reaches 3.7 GHz under boosted conditions. Its cache hierarchy consists of 7680 KB of L1 cache, 96 MB of L2 cache distributed at 1 MB per core, and a 256 MB L3 cache at 2.67 MB per core — providing a substantial pool of fast on-chip memory across the entire processor. The clock multiplier is set to 23 and the multiplier is locked, meaning frequency adjustments through multiplier tuning are not available on this processor.
The Epyc 9645 supports DDR5 memory across 12 channels, with a maximum RAM speed of 6000 MHz and a peak memory bandwidth of 576 GB/s, enabling substantial data throughput for memory-intensive server workloads. It can address up to 9000 GB of total memory and supports ECC, which allows the processor to detect and correct memory errors — a standard requirement in enterprise environments. The bus transfer rate sits at 32 GT/s, governing the speed at which data moves across the memory interface.
The Epyc 9645 supports multithreading, allowing each physical core to handle multiple threads simultaneously. It includes the NX bit for hardware-level memory protection, helping to prevent certain classes of malicious code execution. The processor supports a broad range of instruction sets — MMX, F16C, FMA3, AES, AVX, AVX2, SSE 4.1, and SSE 4.2 — covering vectorized math operations, hardware-accelerated encryption, and extended multimedia and floating-point processing capabilities.