Built for the LGA 1700 socket and manufactured on a 10nm semiconductor process, this processor carries a maximum rated temperature of 100°C and a Thermal Design Power of 45W, reflecting its orientation toward low-power and thermally managed system designs. It includes integrated graphics, supports 64-bit computing, and offers PCIe 5.0 connectivity for use with current-generation storage and expansion hardware.
The processor runs six cores at a base speed of 2.2 GHz each, with 12 threads in total and a turbo clock speed of 5.1 GHz delivered through Turbo Boost version 2 at a clock multiplier of 22. The multiplier is locked, and the design does not use big.LITTLE heterogeneous core architecture. The three-level cache hierarchy consists of 480 KB of L1, 12 MB of L2 at 2 MB per core, and 24 MB of L3 at 4 MB per core, offering a structured data buffer that supports sustained throughput across all active threads.
The integrated Intel UHD Graphics 770 operates at a base clock of 300 MHz and boosts up to a GPU turbo of 1550 MHz, supported by 32 execution units, 256 shading units, 16 texture mapping units (TMUs), and 8 render output units (ROPs). It can drive up to four displays simultaneously and is compatible with DirectX 12, OpenGL 4.5, and OpenCL 3, providing a capable foundation for multi-display productivity use and general-purpose compute tasks directly through the processor.
The processor supports DDR5 memory at speeds up to 4800 MHz across two channels, achieving a peak bandwidth of 76.8 GB/s and a maximum addressable capacity of 192GB. ECC memory support is included, offering hardware-level error detection and correction suited to environments where data reliability and operational continuity are essential requirements.
On the software and instruction side, the processor supports a wide-ranging set including AVX, AVX2, FMA3, AES, F16C, MMX, SSE 4.1, and SSE 4.2, covering vectorized computation, hardware-accelerated encryption, and multimedia instruction handling. Multithreading is enabled across all cores, allowing each to process two threads simultaneously for a total of 12 concurrent threads. The chip also incorporates the NX bit, which enables hardware-enforced separation between executable and non-executable memory regions as a security measure.