The Intel Core Ultra 5 225T is a desktop processor built for the LGA 1851 socket, with compatibility extending to Z890 and B860 chipsets. It is manufactured on a 3nm process node and carries a Thermal Design Power of 35W. The chip includes integrated graphics, supports 64-bit computing, and features PCIe 5 connectivity.
The processor uses big.LITTLE technology, pairing six cores with base speeds not specified and four cores running at 1.9GHz, across a total of 10 threads. It supports Turbo Boost version 2, allowing clock speeds to reach up to 4.9GHz, with a clock multiplier of 25. The multiplier is locked, so manual overclocking is not supported. On the cache side, the chip provides 22MB of L2 cache and 20MB of L3 cache, offering a solid amount of fast-access memory for active workloads.
In PassMark testing, the processor achieves an overall score of 25358, reflecting its multi-threaded capabilities across all available cores and threads. The single-threaded PassMark result stands at 4348, indicating the level of performance available per individual thread during lightly-threaded or sequential workloads.
The integrated graphics unit has a base clock of 300MHz and a turbo frequency of 1800MHz, with support for up to four displays simultaneously. It is compatible with DirectX 12, along with OpenGL 4.5 and OpenCL 3, covering a broad range of graphics and compute workloads handled directly by the integrated solution.
The processor supports DDR5 memory with a maximum speed of 6400MHz across a dual-channel configuration. It can accommodate up to 256GB of total system memory, providing ample headroom for memory-intensive workloads. ECC memory is not supported by this processor.
The processor supports a range of instruction sets including MMX, F16C, FMA3, AES, AVX, AVX2, SSE 4.1, and SSE 4.2, covering general-purpose extensions, floating-point operations, encryption acceleration, and advanced vector processing. It also includes the NX bit, a hardware-level security feature that helps prevent certain classes of malicious code execution by marking memory regions as non-executable.