The Intel Xeon 6736P is manufactured on a 3 nm semiconductor process and carries a Thermal Design Power of 205W, with a maximum operating temperature of 98°C. It supports 64-bit computing and connects via PCIe 5.0, enabling high-bandwidth peripheral communication. The processor does not include integrated graphics, so a discrete GPU is required for display output.
The processor features 36 cores running at a base speed of 2 GHz each, with 72 threads in total and a turbo clock speed of 4.1 GHz via Turbo Boost version 2. The clock multiplier is set at 20 and is not unlocked, meaning frequency adjustments are fixed. Cache is organized across three levels: 4032 KB of L1, 72 MB of L2 at 2 MB per core, and a 144 MB L3 cache at 4 MB per core — providing a substantial on-chip memory hierarchy to support throughput-heavy workloads.
The Xeon 6736P supports DDR5 memory at speeds up to 6400 MHz across eight channels, delivering a maximum bandwidth of 409.6 GB/s and a bus transfer rate of 24 GT/s. It accommodates up to 4000 GB of total memory, making it well-suited for memory-intensive server configurations. ECC memory support is included, providing error detection and correction capabilities important for maintaining data integrity in enterprise environments.
The Xeon 6736P supports multithreading, allowing each core to handle multiple threads simultaneously for improved throughput under parallel workloads. It includes the NX bit for hardware-level memory protection against certain classes of malicious code execution. The processor also carries a broad set of instruction sets — MMX, F16C, FMA3, AES, AVX, AVX2, SSE 4.1, and SSE 4.2 — covering vectorized math, hardware-accelerated encryption, and floating-point operations across a range of application types.
In PassMark testing, the Xeon 6736P achieves a multi-core score of 125,444, reflecting its capacity for handling heavily threaded workloads across its 36 cores. Its single-core PassMark result of 3,445 indicates the per-core processing capability available for tasks that rely on sequential execution rather than parallelism.